Vaire Roadmap, history of Reversible Computing, IBM

As Spectrum IEEE writes ,reversible computing traces back to 1961, when IBM’s Rolf Landauer established that erasing a bit of information always costs energy (“Landauer’s Principle”). By the 1970s, IBM’s Charles Bennett showed a way to do “uncomputation,” reversing intermediate steps so no information (and thus no energy) is lost.

Early reversible computing chips were built in the 1990s at MIT under Thomas Knight, with Michael Frank (then a grad student) helping demonstrate proof-of-concept circuits. Those prototypes recovered energy within the circuit but wasted it via external power supplies.

Fast-forward to 2024: Frank left Sandia National Labs to cofound Vaire Computing, seeking to commercialize reversible chips. The company’s big idea is to embed adiabatic (slow-switching) CMOS logic inside an on-chip resonator—like a pendulum that stores and releases energy as it swings “forward” to compute and “backward” to decompute. The system aims to avoid the usual heat loss by recycling signal energy rather than dumping it as waste.

Vaire’s first chip, taping out in early 2025, is a simple reversible adder in an LC resonator. The next step is a specialized AI-inference chip (planned for 2027), followed by steadily bigger jumps in energy savings. The ultimate goal is an astounding 4,000× boost in efficiency—likely a decade or more away—potentially revitalizing Moore’s Law and meeting the soaring demand for low-power AI.